This invention relates to a method and apparatus for detecting and correcting failures or errors in computer memories.
As computer technology evolves, the associated computer memories become more dense and more affordable for small and low cost systems. Many free standing terminals such as business equipment terminals presently have more memory capacity than some "large" systems of a few years ago. With this increased memory capacity and with the inherent soft failure rate of high-density, memory chips, the correction of memory errors has become critical, even in low-cost products.
One of the techniques for correcting memory errors employs Hamming error correction codes. These Hamming codes, however, add considerable overhead to the memory system cost, and also significantly degrade the associated memory cycle time. Five Hamming bits, for example, would be required to protect an eight bit data word; six bits would be required to protect a 16 bit data word, etc., with one error correction bit being added for each power of two that the size of the data word increases. These codes must be generated and stored on each write cycle and re-generated and checked on each read cycle. Hamming error correction codes generally represent 20 to 60 percent of the memory component cost and could degrade the memory efficiency by as much as 25 percent. In low-cost computer systems in which the associated memory is a large part of the system cost, or in systems in which throughput is critical, the use of Hamming error correction codes could make the system non-competitive in its market.